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AN4650 Datasheet(PDF) 50 Page - STMicroelectronics

Part # AN4650
Description  This document is intended to provide usage information
PDF  102 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN4650 Datasheet(HTML) 50 Page - STMicroelectronics

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Interrupt generation
AN4650
50/102
DocID027415 Rev 1
The code provided below is a basic routine for Activity/Inactivity detection implementation.
In this example the WK_THS field of the WAKE_UP_THS register is set to 000010b,
therefore the Activity/Inactivity threshold is 62.5 mg (= 2 * FS_XL / 26).
Before Inactivity detection, the X,Y,Z slope data must be smaller than the configured
threshold for a period of time defined by the SLEEP_DUR field of the WAKE_UP_DUR
register: this field is set to 0010b, corresponding to 4.92 s (= 2 * 512 / ODR_XL). After this
period of time has elapsed, the accelerometer ODR is internally set to 13 Hz.
The Activity status is detected and the CTRL1_XL register settings immediately restored if
the slope data of (at least) one axis are bigger than the threshold for a period of time defined
by the WAKE_DUR field of the WAKE_UP_DUR register: this field is set to 10b,
corresponding to 9.62 ms (= 2 * 1 / ODR_XL).
4.7
Boot status
After the device is powered up, the LSM6DS3 performs a 20 ms boot procedure to load the
trimming parameters. After the boot is completed, both the accelerometer and the
gyroscope are automatically configured in Power-Down mode.
After power up, the trimming parameters can be re-loaded by setting to 1 the BOOT bit of
the CTRL3_C register.
No toggle of the device power lines is required and the content of the device control
registers is not modified, so the device operating mode doesn’t change after boot. If the
reset to the default value of the control registers is required, it can be performed by setting
to 1 the SW_RESET bit of the CTRL3_C register.
While the boot is running, the EV_BOOT bit of the STATUS_REG register is set high; at the
end of the boot procedure, this bit is set low again. The boot status signal can also be driven
to the INT1 interrupt pin by setting to 1 the INT1_BOOT bit of the INT1_CTRL register.
1
Write 50h into CTRL1_XL
// Turn on the accelerometer
// ODR_XL = 208 Hz, FS_XL = 2g
2
Write 42h into WAKE_UP_DUR
// Set duration for Inactivity detection
// Set duration for Activity detection
3
Write 42h into WAKE_UP_THS
// Set Activity/Inactivity threshold
// Enable Activity/Inactivity detection
4
Write 80h into MD1_CFG
// Activity/Inactivity interrupt driven to INT1 pin



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