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AN4650 Datasheet(PDF) 51 Page - STMicroelectronics

Part # AN4650
Description  This document is intended to provide usage information
PDF  102 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN4650 Datasheet(HTML) 51 Page - STMicroelectronics

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AN4650
Android embedded functions
102
5
Android embedded functions
The LSM6DS3 device implements in hardware the sensor-related functions specified in
Android L; specific IP blocks with negligible power consumption and high-level performance
implement the following functions using only the accelerometer:
Pedometer functions (step detector and step counter);
Significant motion;
Tilt;
Time stamp.
All these functions work at 26 Hz, so the accelerometer ODR must be set at 26 Hz or higher
values.
5.1
Pedometer functions: step detector and step counter
A specific IP block of the LSM6DS3 device is dedicated to pedometer functions: the step
detector and the step counter.
Pedometer functions work at 26 Hz, so the accelerometer ODR must be set at 26 Hz or
higher values.
In order to enable the pedometer functions it is necessary to set to 1 both the FUNC_EN bit
of the CTRL10_C register and the PEDO_EN bit of the TAP_CFG register.
The step detector functionality generates an interrupt every time a step is recognized. In
case of interspersed step sessions, 7 consecutive steps have to be detected before the first
interrupt generation (debounce functionality) in order to avoid false step detections.
This interrupt signal can be driven to the INT1 interrupt pin by setting to 1 the
INT1_STEP_DETECTOR bit of the INT1_CTRL register; it can also be checked by reading
the STEP_DETECTED bit of the FUNC_SRC register.
Instead of generating an interrupt every time a step is recognized, it is possible to generate
it if at least one step is detected within a certain time period. This time period is defined by
setting a value higher than 00h in the STEP_COUNT_DELTA register. It is necessary to set
the TIMER_EN bit of the TAP_CFG register to 1 (to enable the timer) and the TIMER_HR bit
of the WAKE_UP_DUR register to 0 when using this feature: in this case, 1 LSB of the value
of the STEP_COUNT_DELTA register corresponds to 1.6384 seconds. This interrupt signal
can be driven to the INT2 interrupt pin by setting to 1 the INT2_STEP_DELTA bit of the
INT2_CTRL register; it can also be checked by reading the STEP_COUNT_DELTA_IA bit of
the FUNC_SRC register.
The step counter indicates the number of steps detected by the step detector algorithm after
the pedometer function has been enabled. The step count is given by the concatenation of
the STEP_COUNTER_H and STEP_COUNTER_L registers and it is represented as a 16-
bit unsigned number.
The step count is not reset to zero when the accelerometer is configured in Power-Down or
the pedometer is disabled; it can be reset to zero by setting the PEDO_RST_STEP bit of the
CTRL10_C register to 1. After the counter resets, the PEDO_RST_STEP bit is not
automatically set back to 0.



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