AM3874 datasheet(229/361 Pages) TI

229 / 361 page

AM3874, AM3871

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SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013

Table 8-14. Ethernet MAC Switch Registers (continued)

ARM/L3 MASTERS

EMAC HEX

ACRONYM

ADDRESS RANGE

0x4A10 0954

C1_RX_STAT

Subsystem Core 1 Receive Masked Interrupt Status Register

0x4A10 0958

C1_TX_STAT

Subsystem Core 1 Transmit Masked Interrupt Status Register

0x4A10 095C

C1_MISC_STAT

Subsystem Core 1 Misc Masked Interrupt Status Register

0x4A10 0960

C2_RX_THRESH_STAT

Subsystem Core 2 Rx Threshold Masked Int Status Register

0x4A10 0964

C2_RX_STAT

Subsystem Core 2 Receive Masked Interrupt Status Register

0x4A10 0968

C2_TX_STAT

Subsystem Core 2 Transmit Masked Interrupt Status Register

0x4A10 096C

C2_MISC_STAT

Subsystem Core 2 Misc Masked Interrupt Status Register

0x4A10 0970

C0_RX_IMAX

Subsystem Core 0 Receive Interrupts Per Millisecond

0x4A10 0974

C0_TX_IMAX

Subsystem Core 0 Transmit Interrupts Per Millisecond

0x4A10 0978

C1_RX_IMAX

Subsystem Core 1 Receive Interrupts Per Millisecond

0x4A10 097C

C1_TX_IMAX

Subsystem Core 1 Transmit Interrupts Per Millisecond

0x4A10 0980

C2_RX_IMAX

Subsystem Core 2 Receive Interrupts Per Millisecond

0x4A10 0984

C2_TX_IMAX

Subsystem Core 2 Transmit Interrupts Per Millisecond

0x4A10 2000 -0x4A10 3FFF

CPPI_RAM

CPPI RAM(3)

(3)

Denotes CPPI 3.0 registers.

Peripheral Information and Timings

229

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