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AM3874 Datasheet(PDF) 309 Page - Texas Instruments |
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AM3874 Datasheet(HTML) 309 Page - Texas Instruments |
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309 / 361 page  AM3874, AM3871 www.ti.com SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013 8.14 Multichannel Audio Serial Port (McASP) The multichannel audio serial port (McASP) functions as a general-purpose audio serial port optimized for the needs of multichannel audio applications. The McASP is useful for time-division multiplexed (TDM) stream, Inter-Integrated Sound (I2S) protocols, and inter-component digital audio interface transmission (DIT). 8.14.1 McASP Device-Specific Information The device includes six multichannel audio serial port (McASP) interface peripherals (McASP0, McASP1, McASP2, McASP3, McASP4, and McASP5). The McASP module consists of a transmit and receive section. On McASP0/1, these sections can operate completely independently with different data formats, separate master clocks, bit clocks, and frame syncs or, alternatively, the transmit and receive sections may be synchronized. On McASP2, McASP3, McASP4, and McASP5, the transmit and receive sections must always be synchronized. The McASP module also includes shift registers that may be configured to operate as either transmit data or receive data. The transmit section of the McASP can transmit data in either a time-division-multiplexed (TDM) synchronous serial format or in a digital audio interface (DIT) format where the bit stream is encoded for S/PDIF, AES-3, IEC-60958, CP-430 transmission. The receive section of the McASP peripheral supports the TDM synchronous serial format. The McASP module can support one transmit data format (either a TDM format or DIT format) and one receive format at a time. All transmit shift registers use the same format and all receive shift registers use the same format; however, the transmit and receive formats need not be the same. Both the transmit and receive sections of the McASP also support burst mode, which is useful for non-audio data (for example, passing control information between two devices). The McASP peripheral has additional capability for flexible clock generation and error detection/handling, as well as error management. The device McASP0 and McASP1 modules have up to 10 serial data pins, while McASP2, McASP3, McASP4, and McASP5 are limited to up to four serial data pins each. The McASP FIFO size is 256 bytes and two DMA and two interrupt requests are supported. Buffers are used transparently to better manage DMA, which can be leveraged to manage data flow more efficiently. For more detailed information on and the functionality of the McASP peripheral, see the Multichannel Audio Serial Port (McASP) chapter of the AM387x Sitara™ ARM Processors Technical Reference Manual (Literature Number: SPRUGZ7). 8.14.2 McASP0, McASP1, McASP2, McASP3, McASP4, and McASP5 Peripheral Registers Descriptions Table 8-77. McASP0/1/2/3/4/5 Registers HEX ADDRESS RANGE ACRONYM REGISTER NAME MCASP0 MCASP1 MCASP2 MCASP3 MCASP4 MCASP5 0x4803 8000 0x4803 C000 0x4805 0000 0x4A1A 2000 0x4A1A 8000 0x4A1A E000 PID Peripheral ID 0x4803 8010 0x4803 C010 0x4805 0010 0x4A1A 2010 0x4A1A 8010 0x4A1A E010 PFUNC Pin Function 0x4803 8014 0x4803 C014 0x4805 0014 0x4A1A 2014 0x4A1A 8014 0x4A1A E014 PDIR Pin Direction 0x4803 8018 0x4803 C018 0x4805 0018 0x4A1A 2018 0x4A1A 8018 0x4A1A E018 PDOUT Pin Data Out 0x4803 801C 0x4803 C01C 0x4805 001C 0x4A1A 201C 0x4A1A 801C 0x4A1A PDIN Pin Data Input (Read) E01C Read returns pin data input PDSET Pin Data Set (Write) Writes effect pin data set (Alternate Write Address PDOUT) Copyright © 2011–2013, Texas Instruments Incorporated Peripheral Information and Timings 309 Submit Documentation Feedback Product Folder Links: AM3874 AM3871 |
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