PEB2256HT datasheet(392/490 Pages) INFINEON

392 / 490 page

FALC56 V1.2

PEB 2256

T1/J1 Registers

Data Sheet

392

2002-08-27

RCRC2

Receive CRC ON/OFF - HDLC Channel 2

Only applicable in non-auto mode.

If this bit is set, the received CRC checksum is written to RFIFO2

(CRC-ITU-T: 2 bytes). The checksum, consisting of the 2 last bytes in

the received frame, is followed in the RFIFO2 by the status

information byte (contents of register RSIS2). The received CRC

checksum will additionally be checked for correctness. If non-auto

mode is selected, the limits for “valid frame” check are modified.

XCRC2

Transmit CRC ON/OFF - HDLC Channel 2

If this bit is set, the CRC checksum will not be generated internally. It

has to be written as the last two bytes in the transmit FIFO (XFIFO2).

The transmitted frame is closed automatically with a closing flag.

ITF2

Interframe Time Fill - HDLC Channel 2

Determines the idle (= no data to be sent) state of the transmit data

coming from the signaling controller.

= Continuous logical "1" is output

= Continuous flag sequences are output ("01111110" bit patterns)

XMFA2

Transmit Multiframe Aligned - HDLC Channel 2

Determines the synchronization between the framer and the

corresponding signaling controller.

0 =

The contents of the XFIFO2 is transmitted without multiframe

alignment.

1 =

The contents of the XFIFO2 is transmitted multiframe aligned.

RFT12, RFT02

RFIFO2 Threshold Level - HDLC Channel 2

The size of the accessible part of RFIFO2 can be determined by

programming these bits. The number of valid bytes after an RPF

interrupt is given in the following table:

The value of RFT(1:0)2 can be changed dynamically if reception is

not running or after the current data block has been read, but before

the command CMDR3.RMC2 is issued (interrupt controlled data

transfer).

RFT12

RFT02

Size of Accessible Part of RFIFO2

32 bytes (default value)

16 bytes

4 bytes

2 bytes

PEB2256HT Datasheet(PDF) 392 Page - Infineon Technologies AG

PEB2256HT Datasheet(HTML) 392 Page - Infineon Technologies AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL