PEB2256HT datasheet(121/490 Pages) INFINEON

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FALC56 V1.2

PEB 2256

Functional Description T1/J1

Data Sheet

121

2002-08-27

The intrinsic jitter generated in the absence of any input jitter is not more than 0.035 UI.

In digital bipolar line interface mode the clock and data recovery requires HDB3 coded

signals with 50% duty cycle.

5.1.6

Receive Line Coding (T1/J1)

The B8ZS line code or the AMI (ZCS, zero code suppression) coding is provided for the

data received from the ternary or the dual-rail interface. All code violations that do not

correspond to zero substitution rules are detected. The detected errors increment the

code violation counter (16 bits length). In case of the optical interface a selection

between the NRZ code and the CMI Code (1T2B) with B8ZS or AMI postprocessing is

provided. If CMI code is selected the receive route clock is recovered from the data

stream. The CMI decoder does not correct any errors. In case of NRZ coding data is

latched with the falling edge RCLKI.

When using the optical interface with NRZ coding, the decoder is bypassed and no code

violations are detected.

Additionally, the receive line interface contains the alarm detection for Alarm Indication

Signal AIS (Blue Alarm) and the loss-of-signal LOS (Red Alarm).

The signal at the ternary interface is received at both ends of a transformer.

Table 25

RCLK Output Selection (T1/J1)

Clock Source

RCLK Frequency

CMR1.

DCS

CMR1.

RS1/0

SIC2.

SSC2

Receive Data

(1.544 Mbit/s on RL1/RL2,

RDIP/RDIN or ROID)

1.544 MHz

Receive Data

in case of LOS

constant high

1.544 MHz

(generated by DCO-R,

synchronized on SYNC)

110

DCO-R

1.544 MHz

2.048 MHz

6.176 MHz

8.192 MHz

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