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PEB2256HT Datasheet(PDF) 117 Page - Infineon Technologies AG

Part # PEB2256HT
Description  E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
PDF  490 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

PEB2256HT Datasheet(HTML) 117 Page - Infineon Technologies AG

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FALC56 V1.2
PEB 2256
Functional Description E1
Data Sheet
117
2002-08-27
4.6.5
Single Channel Loop-Back
Each of the 32 time slots can be selected for loop-back from the system PCM input (XDI)
to the system PCM output (RDO). This loop-back is programmed for one time slot at a
time selected by register LOOP. During loop-back, an idle channel code programmed in
register IDLE is transmitted to the remote end in the corresponding PCM route time slot.
For the time slot test, sending sequences of test patterns like a 1-kHz check signal shall
be avoided. Otherwise an increased occurrence of slips in the tested time slot disturbs
testing. These slips do not influence the other time slots and the function of the receive
memory. The usage of a quasi-static test pattern is recommended.
Figure 40
Single Channel Loop-Back (E1)
ITS09747
RDO
XDI
RCLK
RL1
RL2
XL1
XL2
IDLE Code
Framer
Trans.
Framer
Rec.
Store
Elast.
Store
Elast.
MUX
MUX
Recovery
Data
Clock +



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