PEB2256HT datasheet(182/490 Pages) INFINEON

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FALC56 V1.2

PEB 2256

Functional Description T1/J1

Data Sheet

182

2002-08-27

5.6

Test Functions (T1/J1)

5.6.1

Pseudo-Random Binary Sequence Generation and Monitor

The FALC56 has the added ability to generate and monitor a 2

15-1 and 220-1 Pseudo-

Random Binary Sequences (PRBS). The generated PRBS pattern is transmitted to the

remote end on pins XL1/2 or XDOP/N and can be inverted optionally. Generating and

monitoring of PRBS pattern is done according to ITU-T O.151 and TR62411 with

maximum 14 consecutive zero restriction.

The PRBS monitor senses the PRBS pattern in the incoming data stream.

Synchronization is done on the inverted and non-inverted PRBS pattern. The current

synchronization status is reported in status and interrupt status registers. Enabled by bit

LCR1.EPRM each PRBS bit error increments an error counter (BEC). Synchronization

is reached within 400 ms with a probability of 99.9% and a bit error rate of up to 10

-1.

The PRBS generator and monitor can be used to handle either a framed

(TPC0.FRA = 1) or an unframed (TPC0.FRA = 0) data stream.

5.6.2

Remote Loop

In the remote loop-back mode the clock and data recovered from the line inputs RL1/2

or RDIP/RDIN are routed back to the line outputs XL1/2 or XDOP/XDON through the

analog or digital transmitter. As in normal mode they are also processed by the

synchronizer and then sent to the system interface.The remote loop-back mode is

selected by setting the corresponding control bits LIM1.RL+JATT. Received data is

looped with or without use of the transmit jitter attenuator (FIFO).

Figure 72

Remote Loop (T1/J1)

ITS09750

RDO

XDI

RCLK

RL1

RL2

XL1

XL2

FIFO

XCLK

RCLK

DCO-R/X

Framer

Rec.

Framer

Trans.

Store

Elast.

Store

Recovery

Data

Clock +

MUX

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