PEB2256HT datasheet(250/490 Pages) INFINEON

250 / 490 page

FALC56 V1.2

PEB 2256

E1 Registers

Data Sheet

250

2002-08-27

Pulse Count Recovery (Read/Write)

Value after reset: 00

PCR(7:0)

Pulse Count Recovery

A LOS alarm is cleared if a pulse-density is detected in the received

bit stream. The number of pulses M which must occur in the

predefined PCD time interval is programmable by the PCR register

and can be calculated as follows:

M = N+1; with 0

≤ N ≤ 255.

The time interval starts with the first detected pulse transition. With

every received pulse a counter is incremented and the actual counter

is compared to the contents of PCR register. If the pulse number is

higher or equal to the PCR value the LOS alarm is reset otherwise the

alarm stays active. In this case the next detected pulse transition

starts a new time interval.

Line Interface Mode 2 (Read/Write)

Value after reset: 20H

SLT(1:0)

Receive Slicer Threshold

00 = The receive slicer generates a mark (digital one) if the voltage

at RL1/2 exceeds 55% of the peak amplitude.

01 = The receive slicer generates a mark (digital one) if the voltage

at RL1/2 exceeds 67% of the peak amplitude (recommended in

some T1/J1 applications).

10 = The receive slicer generates a mark (digital one) if the voltage

at RL1/2 exceeds 50% of the peak amplitude (default,

recommended in E1 mode).

11 = The receive slicer generates a mark (digital one) if the voltage

at RL1/2 exceeds 45% of the peak amplitude.

PCR

PCR7

PCR0

(39)

LIM2

SLT1

SLT0

SCF

ELT

(3A)

PEB2256HT Datasheet(PDF) 250 Page - Infineon Technologies AG

PEB2256HT Datasheet(HTML) 250 Page - Infineon Technologies AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL