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PEB2256HT Datasheet(PDF) 246 Page - Infineon Technologies AG

Part # PEB2256HT
Description  E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
PDF  490 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

PEB2256HT Datasheet(HTML) 246 Page - Infineon Technologies AG

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FALC56 V1.2
PEB 2256
E1 Registers
Data Sheet
246
2002-08-27
EXTIW
Extended CRC4 to Non-CRC4 Interworking
Only valid in multiframe format. This bit selects the reaction of the
synchronizer after the 400 ms time-out has been elapsed and starts
transmitting a remote alarm if FMR2.AXRA is set.
0 =
The CRC4 to Non CRC4 interworking is done as described in
ITU-T G. 706 Annex B.
1 =
The interworking is done according to ITU-T G. 706 with the
exception that the synchronizer still searches the multiframing
even if the 400 ms timer is expired. Switching into doubleframe
format is disabled. If FMR2.AXRA is set the remote alarm bit is
active in the outgoing data stream until the multiframe is found.
Idle Channel Register (Read/Write)
Value after reset: 00
H, 00H, 00H, 00H
IC(31:0)
Idle Channel Selection Bits
These bits define the channels (time slots) of the outgoing PCM frame
to be altered.
Assignments:
IC0
→ Time slot 0
IC1
→ Time slot 1
...
IC31
→ Time slot 31
0 =
Normal operation.
1 =
Idle channel mode. The contents of the selected time slot is
overwritten by the idle channel code defined by register IDLE.
Note: Although time slot 0 can be selected by bit IC0, its contents is
only altered if the transparent mode is selected (XSP.TT0).
70
ICB1
IC0
IC1
IC2
IC3
IC4
IC5
IC6
IC7
(32)
ICB2
IC8
IC9
IC10
IC11
IC12
IC13
IC14
IC15
(33)
ICB3
IC16
IC17
IC18
IC19
IC20
IC21
IC22
IC23
(34)
ICB4
IC24
IC25
IC26
IC27
IC28
IC29
IC30
IC31
(35)



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