PEB2256HT datasheet(261/490 Pages) INFINEON

261 / 490 page

FALC56 V1.2

PEB 2256

E1 Registers

Data Sheet

261

2002-08-27

Global Configuration Register (Read/Write)

Value after reset: 00H

VIS

Masked Interrupts Visible

0 =

Masked interrupt status bits are not visible in registers ISR(5:0).

1 =

Masked interrupt status bits are visible in ISR(5:0), but they are

not visible in register GIS.

SCI

Status Change Interrupt

0 =

Interrupts are generated either on activation or deactivation of

the internal interrupt source.

1 =

The following interrupts are activated both on activation and

deactivation of the internal interrupt source:

ISR2.LOS, ISR2.AIS, ISR3.LMFA16

SES

Select External Second Timer

0 =

Internal second timer selected

1 =

External second timer selected

ECMC

Error Counter Mode COFA

0 =

The S

a6-bit error indications are accumulated in the error

counter CEC3L/H.

1 =

A Change of Frame or Multiframe Alignment COFA is detected

since the last resynchronization. The events are accumulated

in the error counter CEC3L.(1:0).

Multiframe periods received in the asynchronous state are

accumulated in the error counter CEC3L.7-2.

An overflow of each counter is disabled.

Power Down

Switches between power-up and power-down mode.

Power up

Power down

All outputs are driven inactive; multifunction ports are driven

high by the weak internal pullup device.

GCR

VIS

SCI

SES

ECMC

(46)

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