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PEB2256HT Datasheet(PDF) 286 Page - Infineon Technologies AG |
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PEB2256HT Datasheet(HTML) 286 Page - Infineon Technologies AG |
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286 / 490 page ![]() FALC56 V1.2 PEB 2256 E1 Registers Data Sheet 286 2002-08-27 9.3 E1 Status Register Addresses Table 61 E1 Status Register Address Arrangement Address Register Type Comment Page 00 RFIFO R Receive FIFO 289 01 RFIFO R Receive FIFO 289 49 RBD R Receive Buffer Delay 289 4A VSTR R Version Status Register 290 4B RES R Receive Equalizer Status 290 4C FRS0 R Framer Receive Status 0 291 4D FRS1 R Framer Receive Status 1 294 4E RSW R Receive Service Word 295 4F RSP R Receive Spare Bits 296 50 FECL R Framing Error Counter Low 298 51 FECH R Framing Error Counter High 298 52 CVCL R Code Violation Counter Low 299 53 CVCH R Code Violation Counter High 299 54 CEC1L R CRC Error Counter 1 Low 300 55 CEC1H R CRC Error Counter 1 High 300 56 EBCL R E-Bit Error Counter Low 301 57 EBCH R E-Bit Error Counter High 301 58 CEC2L R CRC Error Counter 2 Low 302 59 CEC2H R CRC Error Counter 2 High 302 5A CEC3L R CRC Error Counter 3 Low 303 5B CEC3H R CRC Error Counter 3 High 303 5C RSA4 R Receive S a4-Bit Register 304 5D RSA5 R Receive S a5-Bit Register 304 5E RSA6 R Receive S a6-Bit Register 304 5F RSA7 R Receive S a7-Bit Register 304 60 RSA8 R Receive S a8-Bit Register 304 61 RSA6S R Receive S a6-Bit Status Register 305 62 RSP1 R Receive Signaling Pointer 1 306 63 RSP2 R Receive Signaling Pointer 2 306 |
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