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PEB2256HT Datasheet(PDF) 283 Page - Infineon Technologies AG

Part # PEB2256HT
Description  E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
PDF  490 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

PEB2256HT Datasheet(HTML) 283 Page - Infineon Technologies AG

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FALC56 V1.2
PEB 2256
E1 Registers
Data Sheet
283
2002-08-27
1 =
Bit position x in selected time slot(s) is used for HDLC channel
1 reception and transmission.
Time Slot Bit Select 2 (Read/Write)
Value after reset: FF
H
TSB2(7:0)
Time Slot Bit Selection - HDLC Channel 2
Only bits selected by this register are used for HDLC channel 2 in
selected time slots. Time slot selection is done by setting the
appropriate bits in register TSS2. Bit selection is common to receive
and transmit direction. By default all bit positions within the selected
time slot are enabled.
0 = Bit position x in selected time slot(s) is not used for HDLC
channel 2 reception and transmission.
1 = Bit position x in selected time slot(s) is used for HDLC channel
2 reception and transmission.
Time Slot Bit Select 3 (Read/Write)
Value after reset: FF
H
TSB3(7:0)
Time Slot Bit Selection - HDLC Channel 3
Only bits selected by this register are used for HDLC channel 3 in
selected time slots. Time slot selection is done by setting the
appropriate bits in register TSS3. Bit selection is common to receive
and transmit direction. By default all bit positions within the selected
time slot are enabled.
0 = Bit position x in selected time slot(s) is not used for HDLC
channel 3 reception and transmission.
1 = Bit position x in selected time slot(s) is used for HDLC channel
3 reception and transmission.
70
TSBS2
TSB27
TSB26
TSB25
TSB24
TSB23
TSB22
TSB21
TSB20
(A2)
70
TSBS3
TSB37
TSB36
TSB35
TSB34
TSB33
TSB32
TSB31
TSB30
A3)



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