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PEB2256HT Datasheet(PDF) 281 Page - Infineon Technologies AG |
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PEB2256HT Datasheet(HTML) 281 Page - Infineon Technologies AG |
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281 / 490 page  FALC56 V1.2 PEB 2256 E1 Registers Data Sheet 281 2002-08-27 Transmit FIFO 2 (Write) Value after reset: 00 H XF(15:0) Transmit FIFO for HDLC Channel 2 The function is equivalent to XFIFO. Transmit FIFO 3 (Write) Value after reset: 00 H XF(15:0) Transmit FIFO for HDLC Channel 3 The function is equivalent to XFIFO. Time Slot Even/Odd Select (Read/Write) Value after reset: 00 H HDLC protocol data can be sent in even, odd or both frames of a multiframe. Even frames are frame number 2, 4,and so on, odd frames are frame number 1, 3, and so on. The selection refers to receive and transmit direction as well. Each multiframe starts with an odd frame and ends with an even frame. By default all frames are used for HDLC reception and transmission. Note: The different HDLC channels have to be configured to use different time slots, bit positions or frames. 70 XFIFO2 XF7 XF0 (x9C) XFIFO2 XF15 XF8 (x9D) 70 XFIFO3 XF7 XF0 (x9E) XFIFO3 XF15 XF8 (x9F) 70 TSEO EO31 EO30 EO21 EO20 EO11 EO10 (A0) |
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