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TC1765T Datasheet(PDF) 31 Page - Infineon Technologies AG |
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TC1765T Datasheet(HTML) 31 Page - Infineon Technologies AG |
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31 / 88 page ![]() TC1765 Data Sheet 27 V1.2, 2002-12 Preliminary General Purpose Timer Array Figure 9 shows a global block diagram of the General Purpose Timer Array (GPTA). Figure 9 GPTA Module Block Diagram The GPTA module has 56 input signals and 56 output signals which are connected with 56 Port 1, Port 2, Port 3, and Port 4 pins. The General Purpose Timer Array (GPTA) provides important digital signal filtering and timer support whose combination enables autonomous and complex functionalities. This architecture allows easy implementation and easy validation of any kind of timer functions. M C B 05053 Po rt Co ntrol IO 54 IO 55 P4 .0 P4 .1 P4 .6 P4 .7 G PTA M odule K ernel C loc k G e ne ration U n it Filter & Pres ca le r Ce lls P hase Dis crim ina tor Lo gic Du ty Cy cle M easurem en t D igital P h as e Lo ck ed Lo o p Inte rrup t C o ntro l U nit S ignal G e nera tion U nit G lobal Tim e rs G lob al T im er Ce lls Lo ca l T im e r Ce lls OU T 54 OU T 55 IO 48 IO 49 IO 46 IO 47 P3 .0 P3 .1 P3.1 4 P3.1 5 IO 32 IO 33 IO 30 IO 31 P2 .0 P2 .1 P2.1 4 P2.1 5 IO 16 IO 17 IO 14 IO 15 P1 .0 P1 .1 P1.1 4 P1.1 5 IO 0 IO 1 IN 0 IN 1 OU T 0 OU T 1 IN 5 5 IN 5 4 AS 0 AS 1 AS 5 5 Cloc k C ontro l Add res s Dec od er A/D C onverte r PT IN 0 1 PT IN 1 0 f GP T A PT IN 1 1 PT IN 0 0 Inte rrup t C ontro l SR 0 1 SR 5 2 SR 5 3 SR 0 0 To D M A LT C 5 4 GT C 30 AS 5 4 |
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