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TC1765T Datasheet(PDF) 76 Page - Infineon Technologies AG |
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TC1765T Datasheet(HTML) 76 Page - Infineon Technologies AG |
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76 / 88 page ![]() TC1765 Data Sheet 72 V1.2, 2002-12 Preliminary Input Clock Timing VDDOSC = 2.30 to 2.75 V; VSSOSC = 0 V; TA = -40 °C to +125 °C; Figure 27 Input Clock Timing Parameter Symbol Limit Values Unit min. max. Oscillator clock frequency direct drive fOSC SR (= 1/ tOSC) 416 MHz with PLL 10 16 MHz Input clock frequency driving at XTAL1 direct drive 1/ tOSCDD SR – 40 MHz with PLL 10 30 MHz Input clock high time t1 SR 7 – ns Input clock low time t2 SR 7 – ns Input clock rise time t3 SR – 4ns Input clock fall time t4 SR – 4ns M C T 04882 0.5 V DDO S C Input C lock a t XT AL1 t OS C t 1 t 2 V IH X V IL X t 4 t 3 |
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