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Z80 Datasheet(PDF) 126 Page - Zilog, Inc.

Part # Z80
Description  Z80 CPU PERIPHERALS
PDF  330 Pages
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Manufacturer  ZILOG [Zilog, Inc.]
Direct Link  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z80 Datasheet(HTML) 126 Page - Zilog, Inc.

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UM008101-0601
Direct Memory Access

the routine is being executed. Near the end of the routine, the CPU writes
an ENABLE INTERRUPTS command to the DIVA, which enables it to
generate a new interrupt.
This command is less extensive than the RESET AND DISABLE INTER-
RUPTS command because it does not reset the Interrupt Pending (IP) and
Interrupt Under Service (IUS) latches.
Figure 46.
Write Register 6 Group
D7 D6 D5 D4 D3 D2 D1 D0
Base Register Byte
0
1
11
1
=C3 = Reset
00
0
Hex Command Name
0
1
=C7 = ResetPortA Timing
00
1
0
1
=C8 = ResetPortB Timing
01
0
0
1
= CF = Load
01
1
0
1
= D3 = Continue
10
0
1
0
= AF = Disable Interrupts
01
1
1
0
= AB = Enable Interrupts
01
0
1
0
= A3 = Reset and Disable Interrupts
00
0
1
0
= B7 = Enable after RETI
10
1
1
0
= BF = Read Status Byte
11
1
0
0
= 8B = Reinitialize Status Byte
01
0
1
0
= A7 = Initialize Read Sequence
00
1
1
0
= B3 = Force Ready
10
0
0
0
=87 = Enable DMA
00
1
0
0
= 83 = Disable DMA
00
0
1
0
= BB = Read Mask Follows
11
0
Read Mask (1=Enable)
Status Byte
Byte Counter (Low Byte)
Byte Counter (High Byte)
Port A Address (Low Byte)
Port B Address (High Byte)
0
Port B Address (Low Byte)
Port A Address (High Byte)



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