Z80 datasheet(309/330 Pages) ZILOG

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Z80 Datasheet(PDF) 309 Page - Zilog, Inc.

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Z80 CPU Peripherals

User Manual

UM008101-0601

Serial Input/Output

289

Figure 119. Write Register 5

Transmit Bits/Characters 0 and 1 (D5 and D6)

Together, D6 and D5 control the number of bits in each byte transferred to

the transmit buffer.

Bits to be sent must be right justified, least-significant bits first. The Five-

Or-Less mode allows transmission of one to five bits per character;

however, the CPU should format the data character as depicted in the

following table.

Table 27. Transmit Bits

D6 Transmit Bits/

Character 1

D5 Transmit Bits/

Character 0

Bits/Character

Five or less

017

106

118

Tx CRC Enable

RTS

8-Bit SYNC Character

16-Bit SYNC Character

SDLC Mode (0111 1110 Flag)

External SYNC Mode

SDLC/CRC-16

Tx Enable

Send Break

DTR

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