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Z80 Datasheet(PDF) 310 Page - Zilog, Inc. |
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Z80 Datasheet(HTML) 310 Page - Zilog, Inc. |
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310 / 330 page  <%27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Serial Input/Output 290 Data Terminal Ready (D7) This is the control bit for the DTR pin. When set, DTR is active (Low); when reset, DTR is inactive (High). Write Register 6 This register is programmed to contain the transmit sync character in the Monosync mode, the first eight bits of a 16-bit sync character in the Bisync mode, or a transmit sync character in the External Sync mode. In the SDLC mode, it is programmed to contain the secondary address field, which is used to compare against the address field of the SDLC frame. Figure 120. Write Register 6 Table 28. Data Character Format D7 D6 D5 D4 D3 D2 D1 D0 Result 1 1 1 1 0 0 0 D Sends one data bit 11 10 0 0 D D Sends two data bits 1 1 0 0 0 D D D Sends threedatabits 1 0 0 0 D D D D Sends four data bits 0 0 0 D D D D D Sends five data bits SYNC Bit 0 SYNC Bit 1 SYNC Bit 2 SYNC Bit 3 D7 D6 D5 D4 D3 D2 D1 D0 * SYNC Bit 4 SYNC Bit 5 SYNC Bit 6 SYNC Bit 7 *Also SDLC Address Field |
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