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CS8900A Datasheet(PDF) 108 Page - Cirrus Logic |
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CS8900A Datasheet(HTML) 108 Page - Cirrus Logic |
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108 / 128 page  108 DS271PP3 CS8900A Crystal LAN™ ISA Ethernet Controller CIRRUS LOGIC PRODUCT DATA SHEET The input pins not included in this test are: After the Input Cycle is complete, one more cycle of AEN returns all digital output pins and bi-direc- tional pins to a high-impedance state. 6.1.3 Continuity Cycle The combination of a complete Output Cycle, a complete Input Cycle, and an additional AEN cycle is called a Continuity Cycle. Each Continuity Cycle lasts for 85 AEN clock cycles. The first Continuity Cycle can be followed by additional Continuity Cycles by keeping TEST low and continuing to cy- cle AEN. When TEST is driven high, the CS8900A exits Boundary Scan mode and AEN is again used as the ISA-bus Address Enable. Figure 32 shows a complete Boundary Scan Conti- nuity Cycle. Figure 33 shows Boundary Scan timing. Pin Name Pin # Pin Name Pin # AEN 63 Cl- 82 TEST 76 RXD+ 91 Dl+ 79 RXD- 92 Dl- 80 XTAL1 97 Cl+ 81 Table 41. |
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