Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
56
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002
9.3.3
Digital Basic Type A/Communications Type A Block xx Control Register 0 When Used
as Timer, Counter, CRC, and Deadband
Note that the data in this register, as well as the following
three registers, are a mapping of the functions of the
variables selected in the associated Digital Basic Type A/
Communications Type A Block xx Control Register 0.
Digital Basic Type A Block 00 Control Register 0
(DBA00CR0, Address = Bank 0, 23h)
Digital Basic Type A Block 01 Control Register 0
(DBA01CR0, Address = Bank 0, 27h)
Digital Basic Type A Block 02 Control Register 0
(DBA02CR0, Address = Bank 0, 2Bh)
Digital Basic Type A Block 03 Control Register 0
(DBA03CR0, Address = Bank 0, 2Fh)
Digital Communications Type A 04 Control Register 0
(DCA04CR0, Address = Bank 0, 33h)
Digital Communications Type A 05 Control Register 0
(DCA05CR0, Address = Bank 0, 37h)
Digital Communications Type A Block 06 Control Register 0
(DCA06CR0, Address = Bank 0, 3Bh)
Digital Communications Type A Block 07 Control Register 0
(DCA07CR0, Address = Bank 0, 3Fh)
Table 55:
Digital Basic Type A/Communications Type A Block xx Control Register 0...
Bit #
7
6
5
4
3
2
1
0
POR
--
--
--
--
--
--
--
0
Read/Write
--
--
--
--
--
--
--
RW
Bit Name
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Enable
Bit 7
: Reserved
Bit 6
: Reserved
Bit 5
: Reserved
Bit 4
: Reserved
Bit 3
: Reserved
Bit 2
: Reserved
Bit 1
: Reserved
Bit 0
: Enable
0 = Function Disabled
1 = Function Enabled
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