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Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
20
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002
2.2
CPU Registers
2.2.1
Flags Register
The Flags Register can only be set or reset with logical instruction.
2.2.2
Accumulator Register
Table 8:
Flags Register
Bit #
7
6
5
4
3
2
1
0
POR
0
0
0
0
0
0
1
0
Read/
Write
--
--
--
RW
R
RW
RW
RW
Bit Name
Reserved
Reserved
Reserved
XIO
Super
Carry
Zero
Global IE
Bit 7
: Reserved
Bit 6
: Reserved
Bit 5
: Reserved
Bit 4
: XIO Set by the user to select between the register banks
0 = Bank 0
1 = Bank 1
Bit 3
: Super Indicates whether the CPU is executing user code or Supervisor Code. (This code cannot be accessed
directly by the user and is not displayed in the ICE debugger.)
0 = User Code
1 = Supervisor Code
Bit 2
: Carry Set by CPU to indicate whether there has been a carry in the previous logical/arithmetic operation
0 = No Carry
1 = Carry
Bit 1
: Zero Set by CPU to indicate whether there has been a zero result in the previous logical/arithmetic operation
0 = Not Equal to Zero
1 = Equal to Zero
Bit 0
: Global IE Determines whether all interrupts are enabled or disabled
0 = Disabled
1 = Enabled
Table 9:
Accumulator Register (CPU_A)
Bit #
7
6
5
4
3
2
1
0
POR
0
0
0
0
0
0
0
0
Read/Write
System1
System1
System1
System1
System1
System1
System1
System1
Bit Name
Data [7]
Data [6]
Data [5]
Data [4]
Data [3]
Data [2]
Data [1]
Data [0]
Bit [7:0]
: Data [7:0] 8-bit data value holds the result of any logical/arithmetic instruction that uses a source address-
ing mode
1.
System - not directly accessible by the user
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