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WM8994 Datasheet(PDF) 162 Page - Wolfson Microelectronics plc |
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WM8994 Datasheet(HTML) 162 Page - Wolfson Microelectronics plc |
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162 / 359 page ![]() WM8994 Production Data w PD, April 2012, Rev 4.4 162 DIGITAL AUDIO INTERFACE The WM8994 provides digital audio interfaces for inputting DAC data and outputting ADC or Digital Microphone data. Flexible routing options also allow digital audio to be switched or mixed between interfaces without involving any DAC or ADC. The WM8994 provides two full audio interfaces, AIF1 and AIF2. A third interface, AIF3, is partially supported, using multiplexers to re-configure alternate connections to AIF1 or AIF2. The digital audio interfaces provide flexible connectivity with multiple processors (eg. Applications processor, Baseband processor and Wireless transceiver). A typical configuration is illustrated in Figure 44. Figure 44 Typical AIF Connections In the general case, the digital audio interface uses four pins: ADCDAT: ADC data output DACDAT: DAC data input LRCLK: Left/Right data alignment clock BCLK: Bit clock, for synchronisation In master interface mode, the clock signals BCLK and LRCLK are outputs from the WM8994. In slave mode, these signals are inputs, as illustrated below. As an option, a GPIO pin can be configured as the Left/Right clock for the ADC. In this case, the LRCLK pin is dedicated to the DAC, allowing the ADC and DAC to be clocked independently. Four different audio data formats are supported each digital audio interface: Left justified Right justified I 2S DSP mode All four of these modes are MSB first. They are described in the following sections. Refer to the “Signal Timing Requirements” section for timing information. |
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