TMS320C6711 datasheet(24/129 Pages) TI

24 / 129 page

TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D

FLOATING-POINT DIGITAL SIGNAL PROCESSORS

SPRS088L − FEBRUARY 1999 − REVISED MAY 2004

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

Terminal Functions (Continued)

SIGNAL

PIN NO.

TYPE†

IPD/

DESCRIPTION

SIGNAL

NAME

GFN

GDP

TYPE†

IPD/

IPU‡

DESCRIPTION

JTAG EMULATION (CONTINUED)

EMU1

EMU0

I/O/Z

IPU

Emulation [1:0] pins [C6711/C6711B].

For the C6711/C6711B devices, the EMU0 and EMU1 pins are internally pulled up

with 30-kΩ resistors. For Emulation and normal operation, no external pullup/pull-

down resistors are necessary. However for the Boundary Scan operation, pull down

the EMU1 and EMU0 pins with a dedicated 1-kΩ resistor.

Emulation [1:0] pins [C6711C/C6711D].

• Select the device functional mode of operation

EMU[1:0]

Operation

Boundary Scan/Functional Mode (see Note)

Reserved

Emulation/Functional Mode [default] (see the IEEE 1149.1

JTAG Compatibility Statement

section of this data sheet)

The DSP can be placed in Functional mode when the EMU[1:0] pins are

configured for either Boundary Scan or Emulation.

Note: When the EMU[1:0] pins are configured for Boundary Scan mode, the

internal pulldown (IPD) on the TRST signal must not be opposed in order to

operate in Functional mode.

For the Boundary Scan mode drive EMU[1:0] and RESET pins low [C6711C/11D].

RESETS AND INTERRUPTS

RESET

A13

IPU

Device reset. When using Boundary Scan mode on the C6711C/C6711D device,

drive the EMU[1:0] and RESET pins low.

For the C6711D device, this pin does not have an IPU.”

NMI

C13

IPD

Nonmaskable interrupt

• Edge-driven (rising edge)

Any noise on the NMI pin may trigger an NMI interrupt; therefore, if the NMI pin is not

used, it is recommended that the NMI pin be grounded versus relying on the IPD.

EXT_INT7

External interrupts [C6711/11B]

• Edge-driven

P l it i d

d tl

l t d i th E t

l I t

t P l it R i t bit

EXT_INT6

IPU

• Polarity independently selected via the External Interrupt Polarity Register bits

(EXTPOL.[3:0])

EXT_INT5

IPU

General-purpose input/output pins (I/O/Z) which also function as external

interrupts [C6711C/C6711D only]

• Edge driven

EXT_INT4

• Edge-driven

• Polarity independently selected via the External Interrupt Polarity Register

bits (EXTPOL.[3:0]), in addition to the GPIO registers.

HOST-PORT INTERFACE (HPI)

HINT

J20

IPU

Host interrupt (from DSP to host)

HCNTL1

G19

IPU

Host control − selects between control, address, or data registers

HCNTL0

G18

IPU

Host control − selects between control, address, or data registers

HHWIL

H20

IPU

Host half-word select − first or second half-word (not necessarily high or low order)

HR/W

G20

IPU

Host read or write select

† I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground

‡ For C6711/11B, IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-kΩ IPD or IPU resistor. To pull up a signal

to the opposite supply rail, a 1-kΩ resistor should be used.)

For C6711C/11D, IPD = Internal pulldown, IPU = Internal pullup. [These IPD/IPU signal pins feature a 13-kΩ resistor (approximate) for the IPD

or 18-kΩ resistor (approximate) for the IPU. An external pullup or pulldown resistor no greater than 4.4 kΩ and 2.0 kΩ, respectively, should be

used to pull a signal to the opposite supply rail.]

TMS320C6711 Datasheet(PDF) 24 Page - Texas Instruments

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