 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TMS320VC5407 Datasheet(PDF) 37 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TMS320VC5407 Datasheet(HTML) 37 Page - Texas Instruments |
|
|
37 / 110 page  Functional Overview 37 November 2001 − Revised April 2004 SPRS007D The McBSP allows the multiple channels to be independently selected for the transmitter and receiver. When multiple channels are selected, each frame represents a time-division multiplexed (TDM) data stream. In using time-division multiplexed data streams, the CPU may only need to process a few of them. Thus, to save memory and bus bandwidth, multichannel selection allows independent enabling of particular channels for transmission and reception. All 128 channels in a bit stream consisting of a maximum of 128 channels can be enabled. 15 10 9 8 Reserved XMCME XPBBLK R R/W R/W 7 65 4 2 1 0 XPBBLK XPABLK XCBLK XMCM R/W R/W R R/W LEGEND: R = Read, W = Write Figure 3−12. Multichannel Control Register (MCR1) 15 10 9 8 Reserved RMCME RPBBLK R R/W R/W 7 65 4 2 1 0 RPBBLK RPABLK RCBLK Reserved RMCM R/W R/W R R R/W LEGEND: R = Read, W = Write Figure 3−13. Multichannel Control Register (MCR2) The 5407/5404 McBSP has two working modes: • In the first mode, when (R/X)MCME = 0, it is comparable with the McBSPs used in the 5410 where the normal 32-channel selection is enabled (default). • In the second mode, when (R/X)MCME = 1, it has 128-channel selection capability. Multichannel control register Bit 9, (R/X)MCME, is used as the 128-channel selection enable bit. Once (R/X)MCME = 1, twelve new registers ((R/X)CERC − (R/X)CERH) are used to enable the 128-channel selection. The clock stop mode (CLKSTP) in the McBSP provides compatibility with the serial port interface protocol. Clock stop mode works with only single-phase frames and one word per frame. The word sizes supported by the McBSP are programmable for 8-, 12-, 16-, 20-, 24-, or 32-bit operation. When the McBSP is configured to operate in SPI mode, both the transmitter and the receiver operate together as a master or as a slave. Although the BCLKS pin is not available on the 5407/5404 PGE and GGU packages, the 5407/5404 is capable of synchronization to external clock sources. BCLKX or BCLKR can be used by the sample rate generator for external synchronization. The sample rate clock mode extended (SCLKME) bit field is located in the PCR to accommodate this option. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
