TMS320VC5407 datasheet(88/110 Pages) TI

88 / 110 page

Electrical Specifications

November 2001 − Revised April 2004

SPRS007D

5.11 Reset, BIO, Interrupt, and MP/MC Timings

Table 5−18 assumes testing over recommended operating conditions and H = 0.5tc(CO) (see Figure 5−15,

Figure 5−16, and Figure 5−17).

Table 5−18. Reset, BIO, Interrupt, and MP/MC Timing Requirements

MIN

MAX

UNIT

th(RS)

Hold time, RS after CLKOUT low

th(BIO)

Hold time, BIO after CLKOUT low

th(INT)

Hold time, INTn, NMI, after CLKOUT low†

th(MPMC)

Hold time, MP/MC after CLKOUT low

tw(RSL)

Pulse duration, RS low‡§

4H+3

tw(BIO)S

Pulse duration, BIO low, synchronous

2H+3

tw(BIO)A

Pulse duration, BIO low, asynchronous

tw(INTH)S

Pulse duration, INTn, NMI high (synchronous)

2H+2

tw(INTH)A

Pulse duration, INTn, NMI high (asynchronous)

tw(INTL)S

Pulse duration, INTn, NMI low (synchronous)

2H+2

tw(INTL)A

Pulse duration, INTn, NMI low (asynchronous)

tw(INTL)WKP

Pulse duration, INTn, NMI low for IDLE2/IDLE3 wakeup

tsu(RS)

Setup time, RS before X2/CLKIN low¶

tsu(BIO)

Setup time, BIO before CLKOUT low

tsu(INT)

Setup time, INTn, NMI, RS before CLKOUT low

tsu(MPMC)

Setup time, MP/MC before CLKOUT low

† The external interrupts (INT0−INT3, NMI) are synchronized to the core CPU by way of a two-flip-flop synchronizer that samples these inputs

with consecutive falling edges of CLKOUT. The input to the interrupt pins is required to represent a 1−0−0 sequence at the timing that is

corresponding to three CLKOUTs sampling sequence.

‡ If the PLL mode is selected, then at power-on sequence, or at wakeup from IDLE3, RS must be held low for at least 50 µs to ensure synchronization

and lock-in of the PLL.

§ Note that RS may cause a change in clock frequency, therefore changing the value of H.

¶ The diagram assumes clock mode is divide-by-2 and the CLKOUT divide factor is set to no-divide mode (DIVFCT=00 field in the BSCR).

BIO

CLKOUT

RS, INTn, NMI

X2/CLKIN

th(BIO)

th(RS)

tsu(INT)

tw(BIO)S

tsu(BIO)

tw(RSL)

tsu(RS)

Figure 5−15. Reset and BIO Timings

TMS320VC5407 Datasheet(PDF) 88 Page - Texas Instruments

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