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TMS320VC5407 Datasheet(PDF) 100 Page - Texas Instruments |
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TMS320VC5407 Datasheet(HTML) 100 Page - Texas Instruments |
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100 / 110 page ![]() Electrical Specifications 100 November 2001 − Revised April 2004 SPRS007D 5.15 Host-Port Interface Timing 5.15.1 HPI8 Mode Table 5−33 and Table 5−34 assume testing over recommended operating conditions and P = 0.5 * processor clock (see Figure 5−28 through Figure 5−31). In the following tables, DS refers to the logical OR of HCS, HDS1, and HDS2. HD refers to any of the HPI data bus pins (HD0, HD1, HD2, etc.). HAD stands for HCNTL0, HCNTL1, and HR/W. Table 5−33. HPI8 Mode Timing Requirements MIN MAX UNIT tsu(HBV-DSL) Setup time, HBIL valid before DS low (when HAS is not used), or HBIL valid before HAS low 6 ns th(DSL-HBV) Hold time, HBIL valid after DS low (when HAS is not used), or HBIL valid after HAS low 3 ns tsu(HSL-DSL) Setup time, HAS low before DS low 8 ns tw(DSL) Pulse duration, DS low 13 ns tw(DSH) Pulse duration, DS high 7 ns tsu(HDV-DSH) Setup time, HD valid before DS high, HPI write 3 ns th(DSH-HDV)W Hold time, HD valid after DS high, HPI write 2 ns tsu(GPIO-COH) Setup time, HDx input valid before CLKOUT high, HDx configured as general-purpose input 3 ns th(GPIO-COH) Hold time, HDx input valid before CLKOUT high, HDx configured as general-purpose input 0 ns |
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