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PM6344 Datasheet(PDF) 217 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 217 Page - PMC-Sierra, Inc |
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217 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 204 Conceptually, the data flow through a single framer in this loopback condition can be shown as follows: Figure 30 - Diagnostic Digital Loopback DJAT TRAN FRMR ELST BTSIG[x] BTPCM[x] BTCLK[x] BRFPI BRCLK BTFP[x] BRPCM[x] RPCM RCLK DTIF optional AIS CDRC RDP/RDD[x] RCLKI[x] RDN/RLCV[x] TDP/TDD[x] TCLKO[x] TDN/TFLG[x] 13.4 Using the Per-Channel Serial Controllers 13.4.1 Initialization Before the TPSC block can be used, a proper initialization of the internal registers must be performed to eliminate erroneous control data from being produced on the block outputs. The output control streams should be disabled by setting the PCCE bit in the TPSC Configuration Register to logic 0. Then, all 64 locations of the TPSC must be filled with valid data. Finally, the output streams can be enabled by setting the PCCE bit in the TPSC Configuration Register to logic 1. |
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