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82801AB Datasheet(PDF) 97 Page - Intel Corporation |
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82801AB Datasheet(HTML) 97 Page - Intel Corporation |
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97 / 414 page ![]() 82801AA and 82801AB Datasheet 5-47 Functional Description 5.12 Power Management (D31:F0) 5.12.1 ICH and System Power States Table 5-32 shows the power states defined for ICH-based platforms. The state names generally match the corresponding ACPI states. Table 5-33 shows the transitions rules among the various states. Note that transitions among the various states may appear to temporarily transition through intermediate states. For example, in going from S0 to S1, it may appear to pass through the G0/S0/C2 states. These intermediate transitions and states are not listed in the table. Table 5-32. General Power States for Systems using ICH State/ Substates Legacy Name / Description G0/S0/C0 Full On: Processor operating. Individual devices may be shut down to save power. The different processor operating levels are defined by Cx states, as shown in Table 5-33. Within the C0 state, the ICH can throttle the STPCLK# signal to reduce power consumption. The throttling can be initiated by software or by the THRM# input signal. G0/S0/C1 Auto-Halt: Processor has executed a AutoHalt instruction and is not executing code. The processor snoops the bus and maintains cache coherency. G0/S0/C2 Stop-Gran: The STPCLK# signal goes active to the processor. The processor performs a Stop-Grant cycle, halts its instruction stream, and remain in that state until the STPCLK# signal goes inactive. In the Stop-Grant state, the processor snoops the bus and maintains cache coherency. G1/S1 Stop-Grant: Similar to G0/S0/C2 state. ICH also has the option to assert the processor SLP# signal to further reduce processor power consumption. G1/S3 Suspend-To-RAM (STR): The system context is maintained in system DRAM, but power is shut off to non-critical circuits. Memory is retained, and refreshes continue. All clocks stop except RTC clock. G1/S4 Suspend-To-Disk (STD): The context of the system is maintained on the disk. All power is then shut off to the system except for the logic required to resume. Externally appears same as S5, but may have different wake events. G2/S5 Soft Off (SOFF): System context is not maintained. All power is shut off except for the logic required to restart. A full boot is required when waking. G3 Mechanical OFF (MOFF): System context not maintained. All power is shut off except for the RTC. No “Wake” events are possible, because the system does not have any power. This state occurs if the user removes the batteries, turns off a mechanical switch, or if the system power supply is at a level that is insufficient to power the “waking” logic. When system power returns, transition depends on the state just prior to the entry to G3 and the AFTERG3 bit in the GEN_PMCON3 register (D31:F0, offset A4). Refer to Table 5-41 for more details. |
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