82801AB datasheet(41/414 Pages) INTEL

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82801AA and 82801AB Datasheet

2-13

Signal Description

2.18.2

Test Straps

When PWROK is active (high), driving RTCRST# low for a number of PCI clocks (33 MHz) will

activate a particular test mode as specified in Table 2-19.

Note:

RTCRST# can be driven anytime after PCIRST# is inactive but it is better to drive it as soon as

PWROK goes high to enter a test mode.

Refer to Chapter 16 for a description of each test mode.

2.18.3

External RTC Circuitry

To reduce RTC well power consumption, the ICH implements a new internal oscillator circuit that

is sensitive to step voltage changes in VccRTC and VBIAS. Figure 2-1 shows a schematic diagram

of the circuitry required to condition these voltages to ensure correct operation of the ICH RTC

Table 2-19. Test Strap Definition

Number of PCI Clocks RTCRST# Driven Low

After PWROK Active

Test Mode

No Test Mode Invoked

NAND Chain 1

NAND Chain 2

NAND Chain 3

NAND Chain 4

All “Z”

No Test Mode Invoked

10-24

RESERVED - DO NOT ATTEMPT

>24

No Test Mode Invoked

Figure 2-1. Required External RTC Circuit

12.5 pF

3.3V

VCCSUS

1 k

Ω

Vbatt

1 k

Ω

2200 pF

32768 Hz

Xtal

10 M

Ω

10 M

Ω

12.5 pF

µF

VCCRTC

RTCX2

RTCX1

VBIAS

VSSRTC

Note: Capacitor C2 and C3 values are crystal-dependent.

82801AB Datasheet(PDF) 41 Page - Intel Corporation

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