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82801AB Datasheet(PDF) 45 Page - Intel Corporation |
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82801AB Datasheet(HTML) 45 Page - Intel Corporation |
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45 / 414 page ![]() 82801AB and 82801AA Datasheet 3-3 Power Planes and Pin States Note: 1. ICH sets these signals at reset for processor frequency strap. Power Management SLP_S3# Resume High High High Low Low SLP_S5# Resume High High High High Low SUS_STAT# Resume High High High Low Low SUSCLK (ICH only: 82801AA) Resume Running Processor Interface A20M# Core Note 1 High-Z High-Z Off Off IGNNE# Core Note 1 High-Z High-Z Off Off INIT# Core High-Z High-Z High-Z Off Off INTR Core Note 1 Low Low Off Off NMI Core Note 1 Low Low Off Off SMI# Core High-Z High-Z High-Z Off Off STPCLK# Core High-Z High-Z Low Off Off SMBus Interface SMBCLK, SMBDATA Resume High-Z High-Z High-Z High-Z High-Z Miscellaneous Signals SPKR Core Tri-stated with internal pull-up Low Low Off Off AC’97 Interface AC_RST# Resume Low Low Cold Reset Bit (High) Low Low AC_SDOUT Core Low Running Low Low Off AC_SYNC Core Low Running Low Off Off Unmuxed GPIO Signals GPIO[21] Core High High Defined Off Off GPIO[22] Core Low Low Defined Off Off GPIO[23] Core Low Low Defined Off Off GPIO[26] (unmuxed in ICH0 only: 82801AB) Resume Low Low Defined Defined Defined GPIO[27:28] (unmuxed in ICH0 only: 82801AB) Resume Low Low Defined Defined Defined Table 3-2. Power Plane and States for Output and I/O Signals (Sheet 2 of 2) Signal Name Power Plane During PCIRST# Immediate after PCIRST# S1 S3 S4/S5 |
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