TMS55166 datasheet(41/70 Pages) TI

41 / 70 page

TMS55165, TMS55166, TMS55175, TMS55176

262144 BY 16-BIT MULTIPORT VIDEO RAM

SMVS463 – DECEMBER 1995

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

PARAMETER MEASUREMENT INFORMATION

RAS

CAS

A0 – A8

WEx

DSF

TRG

DQ0 – DQ15

tc(W)

tw(RL)

tw(RH)

td(RLCH)

td(CLRH)

tw(CL)

td(RLCL)

td(CHRL)

th(RA)

th(RLCA)

tsu(CA)

tsu(RA)

th(CLCA)

tw(CH)

th(SFR)

tsu(SFR)

tsu(SFC)

th(SFC)

tsu(TRG)

tsu(WMR)

tsu(WCH)

tsu(WRH)

th(RLW)

th(CLW)

tsu(WCL)

th(RWM)

tsu(DQR)

tsu(DCL)

tw(WL)

th(CLD)

th(RLD)

Row

Column

td(CHRL)

td(CARH)

td(RLCA)

th(RSF)

th(TRG)

td(CACH)

th(RDQ)

Figure 32. Early-Write-Cycle Timing

Table 7. Early-Write-Cycle State Table

CYCLE

STATE

CYCLE

Write operation (nonmasked)

Don’t care

Valid data

Write operation with nonpersistent write-per-bit

Write mask

Valid data

Write operation with persistent write-per-bit

Don’t care

Valid data

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