TMS55166 datasheet(14/70 Pages) TI

14 / 70 page

TMS55165, TMS55166, TMS55175, TMS55176

262144 BY 16-BIT MULTIPORT VIDEO RAM

SMVS463 – DECEMBER 1995

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

byte-write

Byte-write operations can be applied in DRAM-write cycles, block-write cycles, load-write-mask-register cycles,

and load-color-register cycles. Holding either or both WEL and WEU low selects the write mode. In normal write

cycles, WEL enables data to be written to the lower byte (DQ0 – DQ7) and WEU enables data to be written to

the upper byte (DQ8 – DQ15). For early-write cycles, one WEx is brought low before CAS falls. The other WEx

can be brought low before or after CAS falls. The data is latched in with data setup and hold times for

DQ0 – DQ15 referenced to CAS (see Figure 4).

DQ0 – DQ15

WEU

WEL †

CAS

RAS

Valid Input

th(CLD)‡

tsu(DCL)‡

† Either WEx can be brought low prior to CAS to initiate an early-write cycle.

‡ See “timing requirements over recommended ranges of supply voltage and operating free-air temperature” table.

Figure 4. Example of an Early-Write Cycle

TMS55166 Datasheet(PDF) 14 Page - Texas Instruments