TMS55166 datasheet(31/70 Pages) TI

31 / 70 page

TMS55165, TMS55166, TMS55175, TMS55176

262144 BY 16-BIT MULTIPORT VIDEO RAM

SMVS463 – DECEMBER 1995

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

split-register programmable stop point (continued)

Stop-point mode is not active until the CBRS cycle is initiated. The CBRS operation is performed by holding CAS

and WEx low and DSF high on the falling edge of RAS. The falling edge of RAS also latches row addresses

A4 – A7, which are used to define the SAM’s partition length. The other row-address inputs are don’t cares.

Stop-point mode should be initiated immediately after the power-up initialization (see Table 6).

Table 6. Programming Code for Stop-Point Mode

MAXIMUM

PARTITION

ADDRESS AT RAS IN CBRS CYCLE

NUMBER OF

STOP POINT LOCATIONS

PARTITION

LENGTH

A0 – A3

NUMBER OF

PARTITIONS

STOP-POINT LOCATIONS

15, 31, 47, 63, 79, 95, 111, 127, 143, 159, 175,

191, 207, 223, 239, 255

31, 63, 95, 127, 159, 191, 223, 255

63, 127, 191, 255

128

(default)

127, 255

In stop-point mode, the tap point loaded during the split-register-transfer read cycle determines in which SAM

partition the serial output begins and at which stop point the serial output stops coming from one half of SAM

and switches to the opposite half of SAM (see Figure 28).

255

128

127

RAS

Read XFER

Split

Read XFER

Split

Tap = H1

191

Tap = L1

Tap = H2

Read XFER

Split

Tap = L2

255

191

SAM High Half

SAM Low Half

Read XFER

Full

Figure 28. Example of Split-Register Operation With Programmable Stop Points

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