TMS55166 datasheet(16/70 Pages) TI

16 / 70 page

TMS55165, TMS55166, TMS55175, TMS55176

262144 BY 16-BIT MULTIPORT VIDEO RAM

SMVS463 – DECEMBER 1995

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

nonpersistent write-per-bit

When either or both WEL and WEU are low on the falling edge of RAS, the write mask is reloaded. A 16-bit binary

code (the write mask) is input to the device via the DQ pins and latched on the falling edge of RAS. The

write-per-bit mask selects which of the 16 DQs are to be written and which are not. After RAS has latched the

on-chip write-per-bit mask, input data is driven onto the DQ pins and is latched on either the falling edge of CAS

or the first falling edge of WEx, whichever occurs later. WEL enables the lower byte (DQ0 – DQ7) to be written

through the mask and WEU enables the upper byte (DQ8 – DQ15) to be written through the mask. If a write mask

low (write mask = 0) is latched into a particular DQ pin on the falling edge of RAS, write data is not written to

that DQ. If a write mask high (write mask = 1) is latched into a particular DQ pin on the falling edge of RAS, write

data is written to that DQ (see Figure 6).

RAS

CAS

WEL

WEU

DQ0 – DQ15

tsu(DQR)†

tsu(DWL)†

th(RDQ)†

th(WLD)†

Write Mask

Write Data

† See “timing requirements over recommended ranges of supply voltage and operating free-air temperature” table.

Figure 6. Example of a Nonpersistent Write-Per-Bit (Late-Write) Operation

TMS55166 Datasheet(PDF) 16 Page - Texas Instruments