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TDA2EX Datasheet(PDF) 63 Page - Texas Instruments |
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TDA2EX Datasheet(HTML) 63 Page - Texas Instruments |
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63 / 391 page ![]() 63 TDA2EG-17 www.ti.com SPRS969B – AUGUST 2016 – REVISED JUNE 2017 Submit Documentation Feedback Product Folder Links: TDA2EG-17 Terminal Configuration and Functions Copyright © 2016–2017, Texas Instruments Incorporated Table 4-6. EMIF Signal Descriptions (continued) SIGNAL NAME DESCRIPTION TYPE BALL ddr1_dqs3 Data strobe 3 input/output for byte 3 of the 32-bit data bus. This signal is output to the EMIF1 memory when writing and input when reading. IO R24 ddr1_dqsn3 Data strobe 3 invert IO R25 ddr1_vref0 Reference Power Supply EMIF1 A Y20 4.3.6 GPMC NOTE For more information, see the Memory Subsystem / General-Purpose Memory Controller section of the device TRM. Table 4-7. GPMC Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL gpmc_ad0 GPMC Data 0 in A/D nonmultiplexed mode and additionally Address 1 in A/D multiplexed mode IO F1 gpmc_ad1 GPMC Data 1 in A/D nonmultiplexed mode and additionally Address 2 in A/D multiplexed mode IO E2 gpmc_ad2 GPMC Data 2 in A/D nonmultiplexed mode and additionally Address 3 in A/D multiplexed mode IO E1 gpmc_ad3 GPMC Data 3 in A/D nonmultiplexed mode and additionally Address 4 in A/D multiplexed mode IO C1 gpmc_ad4 GPMC Data 4 in A/D nonmultiplexed mode and additionally Address 5 in A/D multiplexed mode IO D1 gpmc_ad5 GPMC Data 5 in A/D nonmultiplexed mode and additionally Address 6 in A/D multiplexed mode IO D2 gpmc_ad6 GPMC Data 6 in A/D nonmultiplexed mode and additionally Address 7 in A/D multiplexed mode IO B1 gpmc_ad7 GPMC Data 7 in A/D nonmultiplexed mode and additionally Address 8 in A/D multiplexed mode IO B2 gpmc_ad8 GPMC Data 8 in A/D nonmultiplexed mode and additionally Address 9 in A/D multiplexed mode IO C2 gpmc_ad9 GPMC Data 9 in A/D nonmultiplexed mode and additionally Address 10 in A/D multiplexed mode IO D3 gpmc_ad10 GPMC Data 10 in A/D nonmultiplexed mode and additionally Address 11 in A/D multiplexed mode IO A2 gpmc_ad11 GPMC Data 11 in A/D nonmultiplexed mode and additionally Address 12 in A/D multiplexed mode IO B3 gpmc_ad12 GPMC Data 12 in A/D nonmultiplexed mode and additionally Address 13 in A/D multiplexed mode IO C3 gpmc_ad13 GPMC Data 13 in A/D nonmultiplexed mode and additionally Address 14 in A/D multiplexed mode IO C4 gpmc_ad14 GPMC Data 14 in A/D nonmultiplexed mode and additionally Address 15 in A/D multiplexed mode IO A3 gpmc_ad15 GPMC Data 15 in A/D nonmultiplexed mode and additionally Address 16 in A/D multiplexed mode IO B4 gpmc_a0 GPMC Address 0. Only used to effectively address 8-bit data nonmultiplexed memories O G1, M1 gpmc_a1 GPMC address 1 in A/D nonmultiplexed mode and Address 17 in A/D multiplexed mode O G3, M2 gpmc_a2 GPMC address 2 in A/D nonmultiplexed mode and Address 18 in A/D multiplexed mode O H5, L2 gpmc_a3 GPMC address 3 in A/D nonmultiplexed mode and Address 19 in A/D multiplexed mode O H6, L1 |
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