TDA2EX datasheet(83/391 Pages) TI1

83 / 391 page

TDA2EG-17

www.ti.com

SPRS969B – AUGUST 2016 – REVISED JUNE 2017

Submit Documentation Feedback

Product Folder Links: TDA2EG-17

Terminal Configuration and Functions

Table 4-23. PRCM Signal Descriptions

SIGNAL NAME

DESCRIPTION

TYPE

BALL

clkout1

Device Clock output 1. Can be used externally for devices with non-

critical timing requirements, or for debug, or as a reference clock on

GPMC as described in Table 5-43 GPMC/NOR Flash Interface

Switching Characteristics - Synchronous Mode - Default and Table 5-

45 GPMC/NOR Flash Interface Switching Characteristics -

Synchronous Mode - Alternate.

K23, L4

clkout2

Device Clock output 2. Can be used externally for devices with non-

critical timing requirements, or for debug.

H5, J25

clkout3

Device Clock output 3. Can be used xternally for devices with non-

critical timing requirements, or for debug.

H25

porz

Power on Reset (active low). This pin must be asserted low until all

device supplies are valid (see reset sequence/requirements)

F19

resetn

Device Reset Input

K24

rstoutn

Reset out (Active low). This pin asserts low in response to any global

reset condition on the device.(2)

E20

xi_osc0

System Oscillator OSC0 Crystal input / LVCMOS clock input.

Functions as the input connection to a crystal when the internal

oscillator OSC0 is used. Functions as an LVCMOS-compatible input

clock when an external oscillator is used.

Y12

xi_osc1

Auxiliary Oscillator OSC1 Crystal input / LVCMOS clock input.

Functions as the input connection to a crystal when the internal

oscillator OSC1 is used. Functions as an LVCMOS-compatible input

clock when an external oscillator is used

AC11

xo_osc0

System Oscillator OSC0 Crystal output

AB12

xo_osc1

Auxiliary Oscillator OSC1 Crystal output

AA11

xref_clk0

External Reference Clock 0. For Audio and other Peripherals.

J25

xref_clk1

External Reference Clock 1. For Audio and other Peripherals.

J24

xref_clk2

External Reference Clock 2. For Audio and other Peripherals.

H24

xref_clk3

External Reference Clock 3. For Audio and other Peripherals.

H25

RMII_MHZ_50_CLK(1)

RMII Reference Clock (50MHz). This pin is an input when external

reference is used or output when internal reference is used.

(1) This clock signal is implemented as 'pad loopback' inside the device - the output signal is looped back through the input buffer to serve

as the internal reference signal. Series termination is recommended (as close to device pin as possible) to improve signal integrity of the

clock input. Any nonmonotonicity in voltage that occurs at the pad loopback clock pin between VIH and VIL must be less than VHYS.

(2) Note that rstoutn is only valid after vddshv3 is valid. If the rstoutn signal will be used as a reset into other devices attached to the SOC, it

must be AND'ed with porz. This will prevent glitches occurring during supply ramping being propagated.

4.3.21.3 System Direct Memory Access (SDMA)

NOTE

For more information, see the DMA Controllers / System DMA section of the device TRM.

Table 4-24. SDMA Signal Descriptions

SIGNAL NAME

DESCRIPTION

TYPE

BALL

dma_evt1

System DMA Event Input 1

G1, L4

dma_evt2

System DMA Event Input 2

H3, H5

dma_evt3

System DMA Event Input 3

dma_evt4

System DMA Event Input 4

TDA2EX Datasheet(PDF) 83 Page - Texas Instruments

TDA2EX Datasheet(HTML) 83 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL