TDA2EX datasheet(102/391 Pages) TI1

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102

TDA2EG-17

SPRS969B – AUGUST 2016 – REVISED JUNE 2017

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Specifications

over operating free-air temperature range (unless otherwise noted)

(1)

PARAMETER(1)

MIN

MAX

UNIT

VSUPPLY (Steady-State)

Supply Voltage Ranges (Steady-

State)

Core (vdd, vdd_dsp)

-0.3

1.5

Analog (vdda_usb1, vdda_usb2,

vdda_per, vdda_ddr, vdda_debug,

vdda_mpu_abe, vdda_usb3,

vdda_csi, vdda_core_gmac,

vdda_gpu, dda_hdmi, vdda_pcie,

vdda_video, vdda_osc)

-0.3

2.0

Analog 3.3V (vdda33v_usb1,

vdda33v_usb2)

-0.3

3.8

vdds18v, vdds18v_ddr1,

vdds_mlbp, vdds_ddr1

-0.3

2.1

vddshv1, vddshv3, vddshv4,

vddshv7-11 (1.8V mode)

-0.3

2.1

vddshv1, vddshv3, vddshv4,

vddshv7, vddshv9-11 (3.3V mode)

-0.3

3.8

vddshv8 (3.3V mode)

-0.3

3.6

VIO (Steady-State)

Input and Output Voltage Ranges

(Steady-State)

Core I/Os

-0.3

1.5

Analog I/Os (except HDMI)

-0.3

2.0

HDMI I/Os

-0.3

3.5

I/O 1.35V

-0.3

1.65

I/O 1.5V

-0.3

1.8

1.8V I/Os

-0.3

2.1

3.3V I/Os (except those powered by

vddshv8)

-0.3

3.8

3.3V I/Os (powered by vddshv8)

-0.3

3.6

Maximum slew rate, all supplies

105

V/s

VIO (Transient Overshoot /

Undershoot)

Input and Output Voltage Ranges (Transient Overshoot/Undershoot)

Note: valid for up to 20% of the signal period

0.2 ×

VDD (4)

Operating junction temperature

range

Automotive

-40

+125

°C

TSTG

Storage temperature range after soldered onto PC Board

-55

+150

°C

Latch-up I-Test

I-test(5), All I/Os (if different levels then one line per level)

-100

100

Latch-up OV-Test

Over-voltage Test(6), All supplies (if different levels then one line per level)

N/A

1.5 ×

Vsupply

max

(1) Stresses beyond those listed as absolute maximum ratings may cause permanent damage to the device. These are stress ratings only,

and functional operation of the device at these or any other conditions beyond those listed under Section 5.4, Recommended Operating

Conditions, is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to VSS, unless otherwise noted.

(3) See I/Os supplied by this power pin in Table 4-1 Pin Attributes

(4) VDD is the voltage on the corresponding power-supply pin(s) for the IO.

(5) Per JEDEC JESD78 at 125°C with specified I/O pin injection current and clamp voltage of 1.5 times maximum recommended I/O

voltage and negative 0.5 times maximum recommended I/O voltage.

(6) Per JEDEC JESD78 at 125°C.

5.2

ESD Ratings

VALUE

UNIT

VESD Electrostatic discharge

Human-Body model (HBM), per AEC Q100-002(1)

±1000

Charged-device model (CDM), per AEC

Q100-011

All pins

±250

Corner pins (A1,

A25, AE1, AE25)

±750

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