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DAC38RF80 Datasheet(PDF) 102 Page - Texas Instruments

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Part # DAC38RF80
Description  Dual- or Single-Channel, Single-Ended or Differential Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip PLL
PDF  155 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DAC38RF80 Datasheet(HTML) 102 Page - Texas Instruments

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102
DAC38RF80, DAC38RF83, DAC38RF84
DAC38RF85, DAC38RF90, DAC38RF93
SLASEA3C – DECEMBER 2016 – REVISED JULY 2017
www.ti.com
DAC38RF83 DAC38RF93
Submit Documentation Feedback
Copyright © 2016–2017, Texas Instruments Incorporated
8.5.30 Sync Source Control 2 Register (address = 0x28) [reset = 0x0000]
Figure 107. Sync Source Control 2 Register (SYNCSEL2)
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
x
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7
6
5
4
3
2
1
0
0
0
1
0
1
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 72. SYNCSEL2 Field Descriptions
Bit
Field
Type
Reset
Description
15:12
Reserved
R/W
0x0
Reserved
11:8
SYNCSEL_PAPAB
R/W
0x0
Select the sync for the PAP A and B.
bit 0 = ‘0’
bit 1 = sysref
bit 2 = sync_out from JESD
bit 3 = mem_spi_sync
7:4
SYNCSEL_PAPCD
R/W
0x0
Select the sync for the PAP C and D.
bit 0 = ‘0’
bit 1 = sysref
bit 2 = sync_out from JESD
bit 3 = mem_spi_sync
3:2
Reserved
R/W
0b00
Reserved
1
SPI_SYNC
R/W
0
This is used to generate the SPI_SYNC signal
0
Reserved
R/W
0
Reserved
8.5.31 PAP path AB Gain Attenuation Step Register (address = 0x29) [reset = 0x0000]
Figure 108. PAP path AB Gain Attenuation Step Register (PAP_GAIN_AB)
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
x
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7
6
5
4
3
2
1
0
0
0
1
0
1
0
0
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 73. PAP_GAIN_AB Field Descriptions
Bit
Field
Type
Reset
Description
15:10
NOT USED
RW
000000
Not Used
9:0
PAPAB_GAIN_STEP
0x000
Gain attenuation step



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