LTC2972 datasheet(108/112 Pages) LINER

108 / 112 page

LTC2972

108

2972fa

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PCB ASSEMBLY AND LAYOUT SUGGESTIONS

Bypass Capacitor Placement

The LTC2972 requires 0.1µF bypass capacitors between

the VDD33 pins and GND, the VDD25 pin and GND, the

REFP pin and REFM pin, and a 10nF capacitor between

the VIN_SNS_CAP pin and GND. If the chip is being pow-

ered from the VPWR input, then that pin should also be

bypassed to GND by a 0.1µF capacitor. In order to be ef-

fective, these capacitors should be made of a high quality

ceramic dielectric such as X5R or X7R and be placed as

close to the chip as possible.

Exposed Pad Stencil Design

The LTC2972’s package is thermally and electrically ef-

ficient. This is enabled by the exposed die attach pad on

the under side of the package which must be soldered

down to the PCB or mother board substrate. It is a good

practice to minimize the presence of voids within the

exposed pad inter-connection. Total elimination of voids

is difficult, but the design of the exposed pad stencil is

key. Figure 46 shows a suggested screen print pattern.

The proposed stencil design enables out-gassing of the

solderpasteduringreflowaswellasregulatingthefinished

solder thickness. See IPC7525A.

PCB Board Layout

Mechanical stress on a PC board and soldering-induced

stress can cause the LTC2972’s reference voltage and the

voltage drift to shift. A simple way to reduce the stress-

related shifts is to mount the IC near the short edge of

the PC board, or in a corner. The board acts as a stress

boundary, or a region where the flexure of the board is

minimal.

The LTC2972’s READ_IIN input current sense amplifier

has very low offsets enabling accurate current, power, and

energy readings. PC Board routing to current sense inputs

may create a thermal voltage offset if differential routing

paths cross dissimilar metal boundaries in the presence

of a thermal gradient. To minimize thermal voltages, route

differential current sense inputs as close together as pos-

sible, and minimize vias. If vias are necessary, make sure

to place both positive and negative current sense path vias

are close together to minimize the temperature difference.

Unused ADC Sense Inputs

Connect all unused ADC sense inputs (VSENSEPn or

VSENSEMn) to GND. In a system where the inputs are

connected to removable cards and may be left floating

in certain situations, connect the inputs to GND using

100k resistors. Place the 100k resistors before any filter

components, as shown in Figure 47, to prevent loading

of the filter.

APPLICATIONS INFORMATION

Figure 46. Suggested Screen Pattern for Die Attach Pad

Figure 47. Connecting Unused Inputs to GND

2972 F45

QFN PACKAGE

APERATURE DESIGN 50% TO 80% REDUCTION

GROUND PLANE

2972 F47

100k

LTC2972

VSENSEP

VSENSEM

100k

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