SB710 datasheet(33/88 Pages) AMD

33 / 88 page

45215

Rev. 1.60 November 09

AMD SB710 Databook

Signal Description

Pin Name

Type

Voltage

Functional Description

REQ#[2:0]

3.3 V (5-V Tolerance)

Request [2:0] Input: indicates that the agent desires use of

the bus.

REQ3#/GPIO70

3.3 V (5-V Tolerance) PCI Request 3 Input / GPIO 70

REQ4#/GPIO71

3.3 V (5-V Tolerance) PCI Request 4 Input / GPIO 71

SERR#

I/OD

3.3 V (5-V Tolerance)

System Error: for reporting address parity errors and data

parity errors on the special cycle command, or any other

system error where the result will be catastrophic.

STOP#

I/O

3.3 V (5-V Tolerance)

Stop: indicates the current target is requesting the master

to stop the current transaction

TRDY#

I/O

3.3 V (5-V Tolerance)

Target Ready

Target Ready: indicates the target agent’s ability to

complete the current data phase of the transaction.

7.5

USB Interface

Pin Name

Type

Voltage

Functional Description

USB_HSD[11:0]P

I/O

AVDD_TX

USB 2.0 Port 11 ~ 0 Positive I/O (See Note 1)

USB_HSD[11:0]N

I/O

AVDD_TX

USB 2.0 Port 11 ~ 0 Negative I/O (See Note 1)

USB_FSD[13:12]P

I/O

S5_3.3V

USB 1.1 port 13:12 (full/low speed) Positive I/O (See Note 2)

USB_FSD[13:12]N

I/O

S5_3.3V

USB 1.1 port 13:12 (full/low speed) Negative I/O (See Note 2)

USBCLK/

14M_25M_48M_OSC

S5_3.3V

48-MHz input clock used for USB

USB_RCOMP

AVDDC

Compensating resistors input

USB_OC[5:0[#/

GPM[5:0]#

I/O

S5_3.3V

USB Over Current [5:0] / GPM [5:0]

USB_OC4# is also multiplexed as IR_RX0

USB_OC6#/IR_TX1/

GEVENT6#

I/O

S5_3.3V

USB Over Current 5 / IR Tx1 (infrared)/ General Event 6

Notes: (1) The USB_HSD[11:0]P and USB_HSD[11:0]N signals are used for connecting internal or external USB

devices via USB Port connectors. These ports are handled by users and are subject directly to ESD events

to either the connector, the device, or to the pins themselves. The USB_HSDP and USB_HSDN signals that

may be exposed to the user through an USB port connection must have ESD protection. Please refer to the

Product Advisory PA_SB700AU1 posted on AMD’s OEM Resource Center for further details on ESD device

specifications.

(2) The USB_FSD[13:12]P and USB _FSD[13:12]N signals are used only for connecting to internal devices.

They support only full or low, but not high speed devices.

7.6

ATA66/100/133

Note: The SB710 does not support the flash controller function. The flash controller should be disabled

by BIOS, and the interface can only be used for IDE function (or as GPIOs, in case of the IDE data bus

bits). Portions of the pin names below that imply flash controller function should be ignored. See the AMD

SB700/SB710/SB750 Schematic Review Checklist

for how to terminate these signals if they are not used.

Pin Name

Type

Voltage

Functional Description

IDE_IORDY/FC_FBCKIN

3.3 V (5-V Tolerance)

IDE IO Ready

IDE_IRQ/FC_INT2

3.3 V (5-V Tolerance)

IDE Interrupt Request/

SB710 Datasheet(PDF) 33 Page - Advanced Micro Devices

SB710 Datasheet(HTML) 33 Page - Advanced Micro Devices

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