VR4102 datasheet(329/701 Pages) NEC

329 / 701 page

CHAPTER 15 PMU (POWER MANAGEMENT UNIT)

329

(2/2)

Bit

Name

Function

D[7]

BATTLOCK

Battery lock interrupt detection

Note

1 : Detected

0 : Not detected

D[6]

CARDLOCK

PCMCIA card lock interrupt detection

Note

1 : Detected

0 : Not detected

D[5]

TIMOUTRST

HAL timer reset detection. Cleared to 0 when 1 is written.

1 : Detected

0 : Not detected

D[4]

RTCRST

RTC reset detection. Cleared to 0 when 1 is written.

1 : Detected

0 : Not detected

D[3]

RSTSW

RESET switch interrupt detection. Cleared to 0 when 1 is written.

1 : Detected

0 : Not detected

D[2]

DMSRST

Deadman’s switch interrupt detection. Cleared to 0 when 1 is written.

1 : Detected

0 : Not detected

D[1]

BATTINTR

Battery low detection during normal operation. Cleared to 0 when 1 is written.

1 : Detected

0 : Not detected

D[0]

POWERSWINTR

POWER switch interrupt detection. Cleared to 0 when 1 is written.

1 : Detected

0 : Not detected

Note

These bits are used by software.

These are never set by hardware, and their settings never affect

hardware.

This register is used to set whether the CPU detects a power-on factor and reset.

It also indicates the status of the DCD# pin.

VR4102 Datasheet(PDF) 329 Page - NEC

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