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VR4102 Datasheet(PDF) 467 Page - NEC |
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VR4102 Datasheet(HTML) 467 Page - NEC |
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467 / 701 page ![]() CHAPTER 24 SIU (SERIAL INTERFACE UNIT) 467 24.2.6 SIUIID (0x0C00 0002: Read) Bit D7 D6D5 D4D3D2 D1 D0 Name IIR[7] IIR[6] Reserved Reserved IIR[3] IIR[2] IIR[1] IIR[0] R/W R RR RRR R R RTCRST 0 0 0 0 0 0 0 1 Other resets 0 0 0 0 0 0 0 1 Bit Name Function D[7..6] IIR[7..6] Becomes 11 when FCR0 = 1 D[5..4] Reserved Write 0 when writing. 0 is returned after read. D[3] IIR[3] Pending character timeout interrupt (in FIFO mode) 1 : Pending interrupt 0 : No pending interrupt D[2..1] IIR[2..1] Indicates the priority level of pending interrupt. See the following table. D[0] IIR[0] Pending interrupts 1 : No pending interrupt 0 : Pending interrupt This register indicates priority levels for interrupts and existence of pending interrupt. From highest to lowest priority, these interrupts are receive line status, receive data ready, character timeout, transmit holding register empty, and modem status. The contents of IIR[3] bit is valid only in FIFO mode, and it is always 0 in 16550 mode. IIR[2] bit becomes 1 when IIR[3] bit is set to 1. |
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