VR4102 datasheet(469/701 Pages) NEC

469 / 701 page

CHAPTER 24 SIU (SERIAL INTERFACE UNIT)

469

24.2.7 SIUFC (0x0C00 0002: Write)

Bit

D6D5

D4D3D2

Name

FCR[7]

FCR[6]

Reserved

FCR[3]

FCR[2]

FCR[1]

FCR[0]

R/W

RTCRST

Other resets

Bit

Name

Function

D[7..6]

FCR[7..6]

Receive FIFO trigger level

11 : 14 Bytes

10 : 08 Bytes

01 : 04 Bytes

00 : 00 Byte

D[5..4]

Reserved

Write 0 when writing. 0 is returned after read.

D[3]

FCR[3]

Switch between 16550 mode and FIFO mode

1 : From 16550 mode to FIFO mode

0 : From FIFO mode to 16550 mode

D[2]

FCR[2]

Transmit FIFO clear/counter clear. Cleared to 0 when 1 is written.

1 : FIFO clear/counter clear

0 : Normal

D[1]

FCR[1]

Receive FIFO clear/counter clear. Cleared to 0 when 1 is written.

1 : FIFO clear/counter clear

0 : Normal

D[0]

FCR[0]

Receive/Transmit FIFO enable

1 : Enable

0 : Disable

This register is used to control the FIFOs.

VR4102 Datasheet(PDF) 469 Page - NEC

VR4102 Datasheet(HTML) 469 Page - NEC

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL