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VR4102 Datasheet(PDF) 472 Page - NEC

Part # VR4102
Description  64/32-bit Microprocessor
PDF  701 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

VR4102 Datasheet(HTML) 472 Page - NEC

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CHAPTER 24 SIU (SERIAL INTERFACE UNIT)
472
24.2.8 SIULC (0x0C00 0003)
Bit
D7
D6D5
D4D3D2
D1
D0
Name
LCR[7]
LCR[6]
LCR[5]
LCR[4]
LCR[3]
LCR[2]
LCR[1]
LCR[0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RTCRST
0
0
0
0
0
0
0
0
Other resets
0
0
0
0
0
0
0
0
Bit
Name
Function
D[7]
LCR[7]
Divisor latch access bit specification
1 : Divisor latch access
0 : Receive buffer, transmit holding register, interrupt enable register
D[6]
LCR[6]
Break control
1 : Set break
0 : Clear break
D[5]
LCR[5]
Parity fixing
1 : Fixed parity
0 : Parity not fixed
D[4]
LCR[4]
Parity setting
1 : Set one bit as odd bit
0 : Set one bit as even bit
D[3]
LCR[3]
Parity enable
1 : Create parity (during transmission) or check parity (during reception)
0 : No parity (during transmission) or no checking (during reception)
D[2]
LCR[2]
Stop bit specification
1 : 1.5 bits (character length is 5 bits)
2 bits (character length is 6, 7, or 8 bits)
0 : 1 bit
D[1..0]
LCR[1..0]
Specifies the length of one character (number of bits)
11 : 8 Bits
10 : 7 Bits
01 : 6 Bits
00 : 5 Bits
This register is used to specify the format for asynchronous data communication and exchange and to set the divisor
latch access bit.
The setting of bit 5 becomes valid according to settings in bits 4 and 3.
Bit 6 is used to send the break status to the receive side’s UART. When Bit6 = 1, the serial output (TxD) is forcibly
set to the spacing (0) state.



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