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FXLS90130 Datasheet(PDF) 9 Page - NXP Semiconductors |
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FXLS90130 Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 247 page  NXP Semiconductors FXLS9xxx0 Single channel inertial sensor 7 Block diagram aaa-030565 BUS_I VBUF VSS BUSRTN IDATA IDATA RSENSE BUS_O DAISY CHAIN SWITCH DRIVER VBUF VREF BUFFER VOLTAGE REGULATOR REFERENCE VOLTAGE LOW VOLTAGE DETECTION OSCILLATOR OTP ARRAY VREG VREGA BUS_I CONTROL LOGIC COMMAND DECODER SERIAL ENCODER OTP PROGRAMMING INTERFACE INTERNAL VOLTAGE REGULATOR BUSSW_L SINC FILTER ∑ CONVERTER OVER- DAMPED G-CELL OFFSET DAC IIR LPF HPF INTERPOLATION OFFSET MONITOR OUTPUT SCALING TRIM DIGITAL CLIPPING USER SENSE SCALING DSP SELF TEST SS_B SPI ARM AND PCM LOGIC I2C SCLK/SCL MOSI MISO/SDA ARM/PCM0 Figure 7. Single channel internal block diagram FXLS9xxx0 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 9 / 247 |
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