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FXLS93421 Datasheet(PDF) 105 Page - NXP Semiconductors |
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FXLS93421 Datasheet(HTML) 105 Page - NXP Semiconductors |
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105 / 254 page ![]() NXP Semiconductors FXLS9xxxx Dual channel inertial sensor 11.3 OTP and read/write register array CRC verification 11.3.1 NXP OTP registers The following registers are internal OTP registers. These registers are verified by the OTP ECC as well as an independent 4-bit CRC for each 16 byte block. Memory type codes F User readable register with OTP Table 196. Memory type code: NXP OTP register 11.3.2 User OTP only registers The following registers are user OTP registers. These registers are verified by the OTP ECC as well as an independent 4-bit CRC for each 16 byte block. The CRC verification uses a generator polynomial of g(x) = X4 + X3 + 1, with a seed value = '0000'. The bits are fed into the CRC calculation from right to left (MSB first) and from top to bottom (lowest address first) in the register map. Memory type codes UF0 One time user programmable OTP region 0 UF1 One time user programmable OTP region 1 Table 197. Memory type code: User OTP register 11.3.3 OTP modifiable registers The following registers are user read/write registers as well as OTP registers with writable mirror registers. The OTP registers are verified by the OTP ECC as well as an independent 4-bit CRC stored in the CRC_UF2 register. The values read from OTP can be over-written while ENDINIT is not set. Once ENDINIT is set, the writable registers (all registers in the R/W and UF2 regions with the exception of the DEVLOCK_WR register) are verified by an additional continuous 4-bit CRC that is calculated on the entire array. The CRC verification uses a generator polynomial of g(x) = X4+X3+1, with a seed value = '0000'. The bits are fed into the CRC calculation from right to left (MSB first) and from top to bottom (lowest address first) in the register map. Registers verified by the OTP CRC: Memory type codes UF2 One time user programmable OTP region 3 with modifiable mirror registers Table 198. Memory type code: CRC verified OTP registers Registers verified by the ENDINIT calculated CRC: Memory type codes UF2 One time user programmable OTP region 3 with modifiable mirror registers R/W User writable register, with the exception of the DEVLOCK_WR register Table 199. Memory type code: ENDINIT CRC verified OTP registers FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 105 / 254 |
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