LTM2987 datasheet(42/114 Pages) AD

42 / 114 page

LTC2971

Rev. 0

For more information www.analog.com

MFR_CONFIG_LTC2971 Data Contents

BIT(S) SYMBOL

OPERATION

b[1]

Mfr_config_dac_gain

DAC buffer gain.

0: Select DAC buffer gain dac_gain_0 (1.38V full-scale).

1: Select DAC buffer gain dac_gain_1 (2.65V full-scale).

b[0]

Mfr_config_ dac_pol

DAC output polarity.

0: Encodes negative (inverting) DC/DC converter trim input.

1: Encodes positive (non-inverting) DC/DC converter trim input.

Cascade Sequence ON with Time-Based Sequence OFF

Cascade sequence ON allows a master power supply to sequence on a series of slave supplies by connecting each

power supply’s power good output, or the LTC2971's configured PG pin, to the control pin of the next power supply, or

LTC2971 channel, in the chain. Please note that the LTC2971's PWRGD pin should not be used for cascade sequenc-

ing. Power good based cascade sequence OFF is not supported, OFF sequencing must be managed using immediate

or time based sequence OFF. See also Tracking Based Sequencing section.

Cascade sequence ON is illustrated in Figure 14. For each slave channel Mfr_config_cascade_on is asserted high and

the associated control input is connected to the power good output of the previous power supply. In this configuration

each slave channel’s startup is delayed until the previous supply has powered up.

Cascade sequence OFF is not directly supported. Options for reversing the sequence when turning the supplies off

include:

• Using the OPERATION command to turn off all the channels with an appropriate off delay.

• Using the FAULT pin to bring all the channels down immediately or in sequence with an appropriate off delay.

When asserted, Mfr_config_cascade_on enables a slave channel to honor fault retries even when its control pin is

low. Additionally, if the system has faulted off after zero or a finite number of retries, an OPERATION command may

be used to turn all cascade channels off then on to clear the faulted OFF state when the slave’s control pin is low. For

this reason we refer to the control pin as being redefined as a sequence pin.

Figure 14. LTC2971 Configured to Cascade Sequence ON and Time-Base Sequence OFF

PMBus COMMAND DESCRIPTION

VOUTP

RUN

VOUTM

VOUT_SNS0

GNDSNS0

POWERGOOD0

FAULTB0

LTC2971

SLAVE

MASTER

CONTROL0

RECOMMENDED CONNECTION

WHEN HARDWARE ON/OFF

CONTROL IS REQUIRED

VOUT_EN0

CONTROL1

CONTROL0

DC/DC

LOAD

VOUTP

RUN

VOUTM

VOUT_SNS1

POWERGOOD1

VOUT_EN1

DC/DC

LOAD

TO NEXT CONTROL PIN

2971 F14

GNDSNS1

LTM2987 Datasheet(PDF) 42 Page - Analog Devices

LTM2987 Datasheet(HTML) 42 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL