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LTM2987 Datasheet(PDF) 12 Page - Analog Devices

Part # LTM2987
Description  2-Channel 짹60V Power System Manager
PDF  114 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM2987 Datasheet(HTML) 12 Page - Analog Devices

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LTC2971
12
Rev. 0
For more information www.analog.com
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating for extended periods may affect device reliability and
lifetime.
Note 2: All currents into device pins are positive. All currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified. If power is supplied to the chip via the VDD33 pin only, connect
VPWR and VDD33 pins together.
Note 3: The ADC total unadjusted error includes all error sources. First,
a two-point analog trim is performed to achieve a flat reference voltage
(VREF) over temperature. This results in minimal temperature coefficient,
but the absolute voltage can still vary. To compensate for this, a high
resolution, drift-free, and noiseless digital trim is applied at the output of
the ADC, resulting in a very high accuracy measurement.
Note 4: Hysteresis in the output voltage is created by package stress
that differs depending on whether IC was previously at a higher or lower
temperature. Output voltage is always measured at 25°C, but the IC is
cycled to 125°C or –40°C before successive measurements. Hysteresis is
roughly proportional to the square of the temperature change.
Note 5: Internal circuitry processes the absolute value of VOUT_SNS –
GNDSNS. Thus, all digital voltages read and programmed are positive.
Note 6: Channels with negative range lack IMON capability. On these
channels, setting Mfr_config_imon_sel to 1 does not harm the part but
returns incorrect results.
Note 7: The current sense resolution is determined by the L11 format,
the values of IOUT_CAL_GAIN, and the magnitude of the current being
measured. See Table 3 for details.
Note 8: The nominal time between successive ADC conversions (latency of
the ADC) for any given channel is tUPDATE_ADC.
Note 9: VOUT_SNS, GNDSNS, and IOUT_SNS input currents are characterized
by input current and input differential current. Input current is defined as
current into a single device pin (see Note 2). Input differential current is
defined as (I+ – I–) where I+ is the current into the positive device pin and
I– is the current into the negative device pin.
Note 10: Nonlinearity is defined from the first code that is greater than or
equal to the maximum offset specification to full-scale code, 1023.
Note 11: While READ_VIN operates with 0V ≤ VVIN_SNS ≤ 60V, the valid
READ_IIN, READ_PIN, and MFR_EIN operating range is 3V ≤ VIIN_SNSP/M
≤ 60V.
Note 12: EEPROM endurance and retention will be degraded when TJ >
125°C.
Note 13: EEPROM endurance and retention are guaranteed by design,
characterization and correlation with statistical process controls. The
minimum retention specification applies for devices whose EEPROM has
been cycled less than the minimum endurance specification.
Note 14: The LTC2971 will not acknowledge any PMBus commands,
except for MFR_COMMON, when a STORE_USER_ALL command is being
executed. See also OPERATION section.
Note 15: Maximum capacitive load, CB, for SCL and SDA is 400pF. Data
and clock rise time (tr) and fall time (tf) are: (20 + 0.1• CB) (ns) < tr <
300ns and (20 + 0.1 • CB) (ns) < tf < 300ns. CB = capacitance of one bus
line in pF. SCL and SDA external pullup voltage, VIO, is 3.13V < VIO < 3.6V.
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. VVPWR = 12V, VVDDIO = VVDD33,VDD33, VDD25, REFP, and REFM pins
floating, unless otherwise indicated. CVDD33 = 100nF, CVDD25 = 100nF, and CREF = 100nF. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
tHD,DAT
Data Hold Time (LTC2971 Receiving
Data) (Note 15)
l
0
ns
Data Hold Time (LTC2971
Transmitting
Data) (Note 15)
l
300
900
ns
tSU,DA
Data Setup Time (Note 15)
l
100
ns
tSP
Pulse Width of Spike Suppressed
(Note 15)
98
ns
tTIMEOUT_BUS Time Allowed to Complete any
PMBus Command After Which Time
SDA Will Be Released and Command
Terminated
Mfr_config_all_longer_pmbus_timeout = 0
Mfr_config_all_longer_pmbus_timeout = 1
l
l
25
200
35
280
ms
ms
Additional Digital Timing Characteristics
tOFF_MIN
Minimum Off-Time for Any Channel
100
ms



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