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AT91 Datasheet(PDF) 90 Page - ATMEL Corporation |
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AT91 Datasheet(HTML) 90 Page - ATMEL Corporation |
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90 / 153 page ![]() 90 AT91X40 Series 1354D–ATARM–08/02 WD User Interface WD Base Address: 0xFFFF8000 (Code Label WD_BASE) WD Overflow Mode Register Name:WD_OMR Access: Read/Write Reset Value:0 Offset: 0x00 • WDEN: Watch Dog Enable (Code Label WD_WDEN) 0 = Watch Dog is disabled and does not generate any signals. 1 = Watch Dog is enabled and generates enabled signals. • RSTEN: Reset Enable (Code Label WD_RSTEN) 0 = Generation of an internal reset by the Watch Dog is disabled. 1 = When overflow occurs, the Watch Dog generates an internal reset. • IRQEN: Interrupt Enable (Code Label WD_IRQEN) 0 = Generation of an interrupt by the Watch Dog is disabled. 1 = When overflow occurs, the Watch Dog generates an interrupt. • EXTEN: External Signal Enable (Code Label WD_EXTEN) 0 = Generation of a pulse on the pin NWDOVF by the Watch Dog is disabled. 1 = When an overflow occurs, a pulse on the pin NWDOVF is generated. • OKEY: Overflow Access Key (Code Label WD_OKEY) Used only when writing WD_OMR. OKEY is read as 0. 0x234 = Write access in WD_OMR is allowed. Other value = Write access in WD_OMR is prohibited. Table 12. WD Memory Map Offset Register Name Access Reset State 0x00 Overflow Mode Register WD_OMR Read/Write 0 0x04 Clock Mode Register WD_CMR Read/Write 0 0x08 Control Register WD_CR Write Only – 0x0C Status Register WD_SR Read Only 0 31 30 29 28 27 26 25 24 –– ––– –– – 23 22 21 20 19 18 17 16 –– ––– –– – 15 14 13 12 11 10 9 8 OKEY 76 54 32 10 OKEY EXTEN IRQEN RSTEN WDEN |
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